A conventional differential current amplifier circuit, which is designed to amplify a differential input current, has the structure illustrated in FIG. 1. More specifically, the circuit comprises a first signal input terminal IN1 and NPN transistors Q1 and Q2. The terminal IN1 is connected to receive an input signal current (I+i) consisting of a DC component I and a signal component (+i) superposed on the DC component. The collector-base path of the NPN transistor Q1 is connected to the first signal input terminal IN1 and the emitter of the NPN transistor Q1 is connected to the ground potential GND. The NPN transistor Q2 has an emitter area n times greater than that of the transistor Q1 and is connected to transistor Q2 in currentmirror fashion. The collector of the NPN transistor Q2 is connected to a first terminal OUT1. The transistors Q1 and Q2 form a first current mirror circuit. A second signal input terminal IN2 is connected to receive an input signal current (I-i) consisting of a DC component I and a signal component (-i) which is differential to the signal component (+i) and superposed on the DC component I. The amplifier circuit further comprises NPN transistors Q3 and Q4. The collector-base path of the NPN transistor Q3 is connected to the second signal input terminal IN2, and the emitter of the NPN transistor Q3 is connected to the ground potential GND. The transistor Q4 has an emitter area n times greater than that of the transistor Q3, and is connected to the transistor Q3 in current-mirror fashion. The collector of the transistor Q4 is connected to a second output terminal OUT2. The transistors Q3 and Q4 form a second current mirror circuit.
In the differential current amplifier circuit of FIG. 1, the collector current of the transistor Q2 (i.e., the current output from the first output terminal OUT1 is n(I+i), whereas the collector current of the transistor Q4 (i.e., the current output from the second output terminal OUT2) is n(I-i).
Therefore, the current gain Gi is: EQU Gi=n (1)
The current gain Gi is no more than the current-mirror ratio n, i.e., the ratio of the emitter area of the transistor Q2 to that of the transistor Q1 or the ratio of the emitter area of the transistor Q4 to that of the transistor Q3.
FIG. 2 shows a modification of the differential current amplifier circuit of FIG. 1. This amplifier circuit is different from the circuit of FIG. 1 in that it has an input-signal current source and transistors Q5 and Q6. The current source supplies a differential input-signal current consisting of a DC component I and a signal component (either +i or -i) superposed on the DC component I. Since the circuit is identical to the circuit of FIG. 1 in all other respects, the same symbols and numerals are used to designate the same components as those illustrated in FIG. 1. The input-signal current source comprises PNP transistors Q01 and Q02 and a constant current source 60. The NPN transistors Q01 and Q02 have their emitters connected together and, thus, constitute a differential pair. The constant current source 60 is connected between the emitter node of the transistors Q01 and Q02 and a Vcc-current potential, and supplies a constant current 2I. The collectors of the transistors Q01 and Q02 are connected to the collectors of the transistors Q1 and Q3, respectively. Hence, when input voltages INA and INB, either containing a differential signal component, are applied to the bases of the transistors Q01 and Q02, signal currents (I +i) and (I-i) flow to the transistors Q1 and Q3, respectively. The PNP transistors Q5 and Q6 are connected together in mirror-current fashion. Their emitters are coupled to the Vcc potential, their bases are connected to each other, and their collectors are connected to the collectors of the transistors Q2 and Q4. The base and collector of the transistor Q6 are connected together. The collector of the transistor Q5 is coupled to an output terminal OUT. A load resistor RL is connected between the output terminal OUT and the ground GND.
In the differential current amplifier circuit of FIG. 2, the output current (I-i) of the transistor Q4 is subtracted from the output current (I+i) of the transistor Q2 by means of the third current mirror circuit, thereby extracting a signal component. Hence, the current i.sub.out by the amplifier circuit is 2ni. In other words, the current gain Gi of the circuit is: EQU Gi=2n (2).
Obviously, this current gain is twice the current gain Gi of the differential current amplifier circuit illustrated in FIG. 1.
In the differential current amplifier circuit of FIG. 2, however, it is necessary to used more and more current-mirror stages in order to increase the current gain Gi. The circuit needs to have more elements, and inevitably consume more power. If the current-mirror ratio (i.e., the emitter-area ratio) is increased, each transistor must be larger, and the integrated circuit chip must be proportionally larger. Consequently, the cost of the integrated circuit will increase, and the power consumption of the circuit will increase, too.
As has been described, the conventional differential current amplifier circuit needs more elements or must comprise large-sized transistors, in order to have a greater current gain. The conventional circuit inevitably consumes much power, and must be made of a large, high-cost integrated-circuit chip.
The present invention has been made to solve the problems described above. Its object is to provide a differential current amplifier circuit which is relatively simple in structure, needs no additional DC current source, and can notwithstanding obtain a great current gain, requires a relatively small number of elements, consumes but a little power, and can hence be made of a low cost integrated circuit.